AtlasRAN: Timing-Aware Evaluation of Open-source 5G Platforms for Integrated Wireless Testbeds

arXiv:2603.14661v3 Announce Type: replace Abstract: Open-source 5G and O-RAN experimentation now spans discrete-event simulators, host-OS emulators, SDR hardware-in-the-loop testbeds, O-RU/Open Fronthaul deployments, wireless digital twins, and accelerator-backed RAN runtimes. These environments may expose similar protocol interfaces while preserving very different timing, I/O, synchronization, buffering, transport, and observability behavior. Thus, studies that appear to measure the same network property may instead measure different execution harnesses: functional compatibility is not timing fidelity. This paper presents AtlasRAN, a timing-aware evaluation framework for deciding what an open-source 5G platform can credibly measure. AtlasRAN provides two reference architectures: a CPU-centric path spanning software emulation, SDR/HIL, and O-RU/OFH execution, and an accelerator/twin path spanning offline modeling, code-realistic twins, and real-time AI-RAN runtimes, plus a compact claim-to-capability matrix. We ground the framework in a CU--DU uplink load study comparing OpenAirInterface RFSim with the Sionna Research Kit, which offloads LDPC decoding to CUDA while retaining much of the surrounding OAI host-OS emulation path. As UE concurrency increases, OAI goodput falls from 114.59 Mb/s at one UE to 16.35 Mb/s in the degraded twelve-UE region, while Sionna-RK falls from 103.34 Mb/s to 16.15 Mb/s. Fairness remains near ideal, CPU/GPU utilization falls with load, and the RFSim real-time factor drops below unity, indicating that the accelerated decoder is under-fed by host-OS inter-process communication and timing effects rather than saturated. AtlasRAN therefore argues that integrated wireless testbeds and digital twins should report timing discipline, transport path, memory movement, and observability as first-class experimental variables.