AIMC
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Heterogeneous Mapping for Analog In-Memory Computing Accelerators: A Unified Workflow
arXiv:2606.02672v1 Announce Type: new Abstract: Analog In-Memory Computing (AIMC) accelerators execute matrix-vector multiplications directly within memory arrays, reducing data movement and improving DNN inference efficiency. Their limited effective precision motivates heterogeneous architectures that combine analog compute tiles with digital processing units. This letter classifies existing methods for partitioning DNN workloads across these resources by mapping granularity, optimization...