Analog Compute
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Related Articles from SNS
Lossy Microwave Linear Analog Computer (MiLAC) for Future MIMO: Learning-based Architecture Designs for Spectral and Energy Efficiency Maximization
arXiv:2606.02369v1 Announce Type: cross Abstract: Microwave linear analog computers (MiLACs) offer a transformative paradigm for future multiple-input multiple-output (MIMO) systems by shifting complex signal processing into the analog domain, thereby significantly reducing computational complexity, radio-frequency chains, and analog-digital converters, while speeding up computation. However, the practical deployment of MiLACs is severely constrained by the inherent hardware losses of the...
Microwave Linear Analog Computer (MiLAC) for Simultaneous Active and Passive Beamforming
arXiv:2605.31549v1 Announce Type: new Abstract: Microwave linear analog computers (MiLACs) have recently emerged to enable high-performance and efficient beamforming in the analog domain. In this paper, we introduce a dual-functionality framework for MiLAC-aided transceivers. Beyond analog-domain precoding/combining (active beamforming), a MiLAC and its antenna array can simultaneously act as a reconfigurable intelligent surface (RIS) (passive beamforming).
Investigating Energy Bounds of Analog Compute-in-Memory with Local Normalization
arXiv:2602.08081v2 Announce Type: replace Abstract: Modern edge AI workloads demand maximum energy efficiency, motivating the pursuit of analog Compute-in-Memory (CIM) architectures. Simultaneously, the popularity of Large-Language-Models (LLMs) drives the adoption of low-bit floating-point formats which prioritize dynamic range. However, the conventional direct-accumulation CIM accommodates floating-points by normalizing them to a shared widened fixed-point scale.
Heterogeneous Mapping for Analog In-Memory Computing Accelerators: A Unified Workflow
arXiv:2606.02672v1 Announce Type: new Abstract: Analog In-Memory Computing (AIMC) accelerators execute matrix-vector multiplications directly within memory arrays, reducing data movement and improving DNN inference efficiency. Their limited effective precision motivates heterogeneous architectures that combine analog compute tiles with digital processing units. This letter classifies existing methods for partitioning DNN workloads across these resources by mapping granularity, optimization...
LIMCA: LLM for Automating Analog In-Memory Computing Architecture Design Exploration
arXiv:2503.13301v2 Announce Type: replace Abstract: Resistive crossbars enabling analog In-Memory Computing (IMC) have emerged as a promising architecture for Deep Neural Network (DNN) acceleration, offering high memory bandwidth and in-situ computation. However, the manual, knowledge-intensive design process and the lack of high-quality circuit netlists have significantly constrained design space exploration and optimization to behavioral system-level tools. In this work, we introduce...
A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator
Announce Type: new Abstract: SRAM-based analog computing-in-memory demonstrates outstanding efficiency. However, it faces three critical challenges: significant ADC overhead, high latency for multi-bit inputs, and limited read bitline voltage. To address these issues, this work proposes a multi-bit highly reconfigurable 256x128 in-memory computing array supporting 1-7b input, 2-4b weight, and 1-7b output.
20 ps Non-Destructive Read and 1 ns Write Operations at <5 V in Ferroelectric HfO2/ZrO2 Non-Volatile Memories
arXiv:2606.03677v1 Announce Type: new Abstract: Achieving low-voltage, nanosecond multi-level programming and non-destructive read-out of ferroelectric non-volatile memories (NVM) is critical for analog in-memory computing architectures relying on ferroelectric capacitive devices (FeCap). We integrate HfO2/ZrO2 ferroelectric nanolayers concurrently in the BEOL of CMOS and on SiO2/Si, achieving nanosecond multilevel switching with programming voltages below 5 V. Partial ferroelectric...
Beyond Gradient Descent: Adam for Analog Ising Machines
Announce Type: new Abstract: As Moore's law reaches its limits, Ising machines offer a promising alternative computing approach for difficult optimization problems. However, many analog, time-continuous Ising machines rely on gradient-descent-like dynamics to find solutions, which can limit speed and robustness.
Beyond Gradient Descent: Adam for Analog Ising Machines
Announce Type: cross Abstract: As Moore's law reaches its limits, Ising machines offer a promising alternative computing approach for difficult optimization problems. However, many analog, time-continuous Ising machines rely on gradient-descent-like dynamics to find solutions, which can limit speed and robustness.
Numerical Analysis on Backward Stochastic Differential Equations by Finite Transposition Method
arXiv:2606.08731v1 Announce Type: cross Abstract: In this paper, we propose a finite transposition method to solve backward stochastic differential equations (BSDEs, for short). Based on the transposition solution theory for BSDEs, our method offers a promising way of efficiently computing solutions, which can be regarded as an analogous method for BSDEs as the classical finite element method for partial differential equations. Our method has the advantage of easily computable conditional...