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Related Articles from SNS
OpenOpt: An Open-Source SRAM Optimizer Based on Equivalent Circuit Model
arXiv:2606.09129v1 Announce Type: new Abstract: This paper proposes a co-optimization framework that jointly optimizes SRAM architecture and transistor sizing using equivalent circuit models. The framework simplifies inactive SRAM cells into equivalent RC loads and static power models, achieving up to 61.4$\times$ simulation speedup while maintaining high fidelity (read/write delay error $<$0.22%, power error $<$1.68%). A joint search space encompassing architecture parameters and device...
Accuracy-Configurable Floating-Point Multiplier Design for SRAM-Based Compute-in-Memory
arXiv:2606.08430v1 Announce Type: new Abstract: Digital Compute-in-Memory (DCiM) reduces data movement and has become a promising solution for energy-efficient edge AI. However, most existing DCiM frameworks still primarily target integer or fixed-point arithmetic, and provide limited support for compiler-integrated and accuracy-configurable floating-point computation. Directly integrating conventional IEEE 754 floating-point units into dense SRAM-based DCiM arrays, however, incurs high area...
Tiny Collaborative Inference for Occlusion-Robust Object Detection
arXiv:2606.02894v2 Announce Type: replace Abstract: Edge AI nodes for search and rescue are increasingly expected to run computer vision locally, yet ultra-low-end hardware imposes hard constraints on memory, compute, and inter-device communication. This work addresses occlusion-robust object detection on devices with less than 1 MB SRAM by combining an MCUNet backbone, a YOLOv2 detection head, and Lite quantisation. Two collaborative inference strategies are evaluated: feature-level fusion,...
A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator
Announce Type: new Abstract: SRAM-based analog computing-in-memory demonstrates outstanding efficiency. However, it faces three critical challenges: significant ADC overhead, high latency for multi-bit inputs, and limited read bitline voltage. To address these issues, this work proposes a multi-bit highly reconfigurable 256x128 in-memory computing array supporting 1-7b input, 2-4b weight, and 1-7b output.
Tiny Collaborative Inference for Occlusion-Robust Object Detection
Announce Type: new Abstract: Small edge devices such as IoT surveillance nodes and search-and-rescue (SAR) platforms are increasingly expected to run computer vision locally. On ultra-low-end hardware, however, object detection is limited by available memory and compute, by communication costs when several devices cooperate, and by the loss of accuracy caused by occlusion. The work evaluates occlusion-robust object detection on devices with less than 1 MB SRAM by combining an MCUNet...
Upstart chipmakers keep challenging Nvidia. This time it's Microsoft-backed D-Matrix
In the increasingly competitive AI chip market, there's another startup in production that claims an advantage over Nvidia, the world's most valuable company. D-Matrix, located three miles away from Nvidia's Silicon Valley headquarters, says its chips can run inference workloads 10 times faster and using five times less energy than a standalone graphics processing unit from the market leader — as long as the workloads are small. The new inference chip, called Corsair, takes a novel approach...
Lauf eElja Electric Mountain Bike Review: Power Trip
At 37.7 pounds, it’s just a few pounds heavier than my traditional mountain bike. And yet, with a motor capable of providing 350 watts of assistance expertly hidden in the bottom bracket, the new eElja is anything but a traditional bike. Over the past decade or so, Icelandic brand Lauf became most well known for its innovative front suspension.
PlayStation Architecture
Supporting imagery A quick introduction Sony knew that 3D hardware could get very messy to develop for. Thus, their debuting console will keep its design simple and practical… Although this may come at a cost!
OpenACMv2: An Accuracy-Constrained Co-Optimization Framework for Approximate DCiM
Announce Type: replace Abstract: Digital Compute-in-Memory (DCiM) accelerates neural networks by reducing data movement. Approximate DCiM can further improve power-performance-area (PPA), but demands accuracy-constrained co-optimization across coupled architecture and transistor-level choices. Building on OpenYield, we introduce Accuracy-Constrained Co-Optimization (ACCO) and present OpenACMv2, an open framework that operationalizes ACCO via two-level optimization: (1) accuracy-constrained...
Hacking your PC using your speaker without ever touching it
In my last post, I talked about reverse engineering my new Creative Sound Blaster Katana V2X's firmware. What initially started as simply wanting to write a Linux tool for communicating with my speaker ended up with me discovering vulnerabilities which allow any attacker within a ~15M range of any Katana V2X to turn it into a covert spying tool and Rubber Ducky - all without ever having to pair with or physically touch the device. CTprotocol background As I explained in my previous post, the...